Silver Chips

Sliverchips Design Solutions is a top SoC ASIC/FPGA design and verification services company. Our team can start from spec and take it to silicon on turnkey basis. We also offer onsite and offsite services to our clients globally. We have been offering our services for last 7 years to many clients globally ranging from top 10 semiconductor companies to many startups. Some of our ASIC design and verification services range from ASIC design, architecture, RTL, OVM/UVM verification to synthesis, STA, DFT, scan, floorplanning, place & route, drc/lvs, GDSII etc. Our FPGA design and emulation services includes FPGA design, emulation, porting, prototyping using latest Altera and Xilinx Methodologies. We also offer analog and mixed signal mask layout services making extensive use of Cadence virtuoso tool.
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Degital Design

Feasibility report, micro-architecture, RTL coding – Verilog, SystemVerilog, Lint, CDC, Synth, STA .

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FPGA porting of IP/system, FPGA specific optimization, Xilinx / Intel / MicroChip / Lattice specific porting and debugging expertise.

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Test-plan and VE development and enhancement with SystemVerilog, UVM, IP/SoC level verification based on Coverage-driven directed and random tests.

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IP Maintenance and Support

Customer IP maintenance, end-customer support, system integration, application level logic updates, system level verification.

ASIC Front end Development

Pronesis Technologies provides services in areas of RTL development, FPGA implementation, Module and full-chip level verification, Pre and Post silicon validation, Verification IP development in Verilog, SystemVerilog using UVM, OVM, etc.

ASIC Physical Design

Pronesis Technologies provides all services in area of Physical Design. These services include Top and block level physical implementation, Analog block integratin, Floorplanning, Clock tree synthesis, Place & Route, Timing closure, Physical verification, IR Drop/EM/SI analysis and closure, etc.